Delta Electronics Network Device VFD-S Spezifikationen PDF herunterladen (Seite 71)

VFD-S Series

5-54

RTU mód:

ADR

01H

CMD 03H

21H Starting address

02H

00H Number of data

(count by word)

02H

CRC CHK Low 6FH

CRC CHK High F7H

CRC (Cyclical Redundancy Check) is calculated by the following steps:

Step 1 : Load a 16-bit register (called CRC register) with FFFFH.

Step 2: Exclusive OR the first 8-bit byte of the command message with the low order byte

of the 16-bit CRC register, putting the result in the CRC register.

Step 3: Examine the LSB of CRC register.

Step 4: If the LSB of CRC register is 0, shift the CRC register one bit to the right with MSB

zero filling, then repeat step 3. If the LSB of CRC register is 1, shift the CRC

with the polynomial value A001H, then repeat step 3.

Step 5: Repeat step 3 and 4 until eight shifts have been performed. When this is done, a

complete 8-bit byte will have been processed.

Step 6: Repeat step 2 to 5 for the next 8-bit byte of the command message. Continue

doing this until all bytes have been processed. The final contents of the CRC

message, the upper and lower bytes of the CRC value must be swapped, i.e.

the lower order byte will be transmitted first.

The following is an example of CRC generation using C language. The function takes two

arguments:

Unsigned char* data $ a pointer to the message buffer

Unsigned char length $ the quantity of bytes in the message buffer

The function returns the CRC value as a type of unsigned integer.

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Delta Electronics Network Device VFD-S Spezifikationen Seite 71